Many of various devices, such as a semiconductor element, liquid crystal display element, image pickup element (CCD: charge coupled device) and thin film magnetic head, are produced by stacking a large number of layer patterns on a substrate and exposing the same by using an exposure apparatus. Therefore, when exposing patterns of the second layer or layers after that on the substrate, alignment of each shot region having a pattern already formed thereon and mask pattern image, that is, alignment of the substrate and reticle has to be performed accurately. For this purpose, marks for aligning called alignment marks are respectively formed in a form of being attached to respective shot regions (chip pattern regions) on the substrate, on which the first layer pattern is exposed, in a stage coordinate system.
When the substrate with alignment marks formed thereon is transferred to an exposure apparatus, mark positions (coordinate values) in the stage coordinate system is measured by a mark measurement device provided to the exposure apparatus. Next, based on the measured mark positions and designed positions of the marks, alignment for aligning one shot region on the substrate to the reticle pattern is performed.
An the alignment method, the die-by-die (D/D) alignment for aligning by measuring an alignment mark of each shot region on the substrate is known, however, in terms of improving the throughput, the enhancement global alignment (EGA) for accurately specifying regularity of an shot arrangement on the substrate by using a statistical method as disclosed in the Japanese Unexamined Patent Publications No. 61-44429 and No. 62-84516 has become mainstream currently.
The EGA is a method of measuring positions of alignment marks of a plurality (for example 7 to 15) of sample shots selected in advance, operating statistical calculation using the least-square method, etc., so that an error of the measured values from designed positions of the alignment marks becomes minimum, calculating positional coordinates of all shot regions (a shot arrangement) on the substrate, then, stepping the substrate stage based on the calculated shot arrangement. The EGA eliminates mainly linear errors (a remained rotation error of the substrate, an orthogonal degree error of the stage coordinate system (or shot arrangement), linear expansion and contraction (scaling) and offset (horizontal movement) of the substrate (the center position), etc.) arising on the shot arrangement.
Also, due to nonlinear deformation on the substrate caused by polishing and other processing and thermal expansion, a stage grid error (error between the stage coordinate systems) between exposure apparatuses and absorption state of the substrate, etc., a nonlinear shot arrangement error arises. As a technique for eliminating the nonlinear errors (random errors) as above, the grid compensation matching (GCM) is known.
As the GCM, there are a method of, during an exposure sequence (exposure processing on a process wafer), extracting nonlinear components by using a result of EGA as a criterion by making an EGA measurement again, holding an averaged value of extracted nonlinear components of a plurality of wafers as a map correction value, and correcting shot positions by using the map correction value in the exposure sequence after that (for example, refer to the Japanese Unexamined Patent Publication No. 2001-345243); and a method of measuring nonlinear components (a deviation amount of each shot) by using a standard wafer for each exposure condition and process in advance separately from the exposure sequence, storing the same as map correction files, and using a map correction file in accordance with the exposure condition to correct the respective shot positions (for example, refer to the Japanese Unexamined Patent Publication No. 2002-353121), etc.
Also, a technique of evaluating differences of positions of a shot arrangement after eliminating linear error components by the EGA method explained above and designed positions based on a predetermined evaluation function (nonlinear error components), determining a function for expressing the nonlinear components based on the evaluation results and, based thereon, correcting the shot arrangement has been applied by the present inventors (the Japanese Patent Application No. 2003-49421).
To furthermore improve accuracy of superimposition of circuit patterns, there is known super distortion matching (SDM), wherein a distortion of a projection optical system of the exposure apparatus used for exposure in the previous step is measured in advance and registered as distortion data to a database, and focusing characteristics, etc. of the projection optical system of the exposure apparatus in the next step is adjusted in units of lot, so that the same image distortion as image distortion based on the distortion in the previous step arises in the exposure apparatus used for exposure in the next stop from the distortion data and exposure history of the substrate (for example, refer to the Japanese Unexamined Patent Publications No. 2000-36451 and No. 2001-338860).
In addition, since a level difference due to circuit patterns, etc. formed in the previous stop exists on a substrate surface, on which a device is being formed, as a technique relating to focus adjusting, there is proposed a technique for providing a surface shape measurement device for measuring the surface shape of the substrate to the exposure apparatus, measuring a surface shape of a substrate during an exposure sequence, obtaining an optimal focal position and correcting based thereon (for example, refer to the Japanese Unexamined Patent Publication No. 2002-43217). Also, as a technique relating to determination of the best focal position to be a criterion of adjusting a focal position of the projection optical system of the exposure apparatus, there is a method of exposing and transferring a test pattern to a test substrate at a plurality of positions in the direction along an optical axis of the projection optical system, checking after development, and using a focal position where the finest pattern is exposed as the best focus.
As explained above, the substrate transferred to the exposure apparatus is subjected to measurement of a variety of information on the substrate, such as mark positions and surface shape, immediately before performing exposure processing, a correction value, etc. are suitably calculated based thereon, and alignment of the substrate is made by using the same to perform exposure processing, so that a circuit pattern is highly accurately formed on the substrate.
However, in the related arts explained above, since measurement of a variety of information on the substrate is made on the substrate transferred to the exposure apparatus immediately before performing the exposure processing, for example, when sufficiently highly accurate measurement cannot be made due to deformation and crush, etc. arising on the marks, there have been disadvantages that sufficient alignment accuracy cannot be secured, suspension of the exposure processing due to arising of an alignment error and re-measurement of other marks become necessary, and the throughput (a processing amount per unit time) declines in some cases. Particularly, in the EGA, GCM and SDM, etc., complicated calculation processing is performed, so that a certain time is necessary for obtaining a solution (correction coefficient) in some cases, so that the exposure processing on the substrate has to be in a standby state during that time. Therefore, calculation of the correction value has to be made in units of lot or process, and an optimal correction cannot be made for each substrate or each shot.
Also, when some abnormality arises in the previous step and a pattern formed on the substrate can not satisfy the required accuracy, performing of next exposure step becomes wasteful operation, so that it has to be effectively prevented.
Patent article 1: the Japanese Unexamined Patent Publications No. 61-44429
Patent article 2: the Japanese Unexamined Patent Publications No. 62-84516
Patent article 3: the Japanese Unexamined Patent Publications No. 2001-345243
Patent article 4: the Japanese Unexamined Patent Publications No. 2002-353121
Patent article 5: the Japanese Unexamined Patent Publications No. 2000-36451
Patent article 6: the Japanese Unexamined Patent Publications No. 2001-338860
Patent article 7: the Japanese Unexamined Patent Publications No. 2002-43217